Circuit Breaker

Processor controlled circuit breaker trip system having reliable status display

Circuit Breaker Abstract
A fault-powered, processor-based circuit breaker tripping system employs a reliable low power trip indicator circuit that is normally powered from the tripping system. A liquid crystal display is used to indicate the status of the system, and a battery is used as a secondary power source after a trip terminates the power to the system. The battery is enabled by a manual switch or by a latch which responds to one of a plurality of trip signals from the processor. The latch also provides signals to a driver circuit to drive the LCD. Once enabled, the battery provides power to the latch and the LCD so that the cause of the trip may be displayed during a power fault. The manual switch can be used to select status signals to be displayed on the LCD, and to indicate the condition of the battery. The LCD includes a segment for indicating that the system is energized and power is being drawn from the current path but that amount of power is below all fault levels and insufficient to operate the system.

Circuit Breaker Claims
We claim:

1. A circuit breaker tripping system comprising:

a processor which analyzes current in the circuit breaker and generates a plurality of trip signals; and

a trip indicator circuit, responsive to the trip signals and operating from power provided by the tripping system, including:

a battery;

latch means, responsive to the processor, for latching at least one of the trip signals and for asserting a battery enable signal;

a display;

a driver circuit, responsive to the latch means, for driving the display;

means for arbitrating power to the latch means and the trip indicator circuit either from the tripping system or from the battery when said battery enable signal is asserted; and

switch means for permitting an operator to assert said battery enable signal independently of the trip signals from the processor.

2. A circuit breaker tripping system, according to claim 1, further including an electrical connector for connecting the trip indicator circuit to a remaining portion of the tripping system wherein a terminal of the battery is connected to said connector such that current from the battery must pass through the electrical connector to prevent power being drawn from the battery without the trip indicator circuit being connected to the remaining portion of the tripping system.

3. A tripping system, according to claim 1, wherein the trip indicator circuit further includes a display control processor, responsive to the processor, for controlling the display.

4. A tripping system, according to claim 1, wherein the trip indicator circuit further includes:

indicator means having display means for indicating that the operating power provided by the tripping system is in excess of a first level; and

control means, operative in response to the power provided by the tripping system being in excess of a second level that is greater than the first level, for controlling the indicator means.

5. A tripping system, according to claim 4, wherein the second level corresponds to the system providing operating power to the trip indicator circuit.

6. A tripping system, according to claim 5, wherein the display is an LCD type and the indicator means includes an LCD bar segment.

7. A tripping system, according to claim 4, wherein the second level corresponds to the system providing operating power to the trip indicator circuit and wherein the display is an LCD type and the indicator means includes an LCD bar segment.

8. A tripping system, according to claim 1, wherein the trip indicator circuit is optionally connected to a remaining portion of the tripping system through an electrical connector.

9. For use in a circuit breaker tripping system, a trip indicator circuit which is normally powered, via a current path, from current monitored by the tripping system, comprising:

indicator means including display means for indicating that the power from the tripping system current path is in excess of a first level; and

control means, operative in response to the power from the tripping system current path being in excess of a second level that is greater than the first level, for controlling the indicator means, wherein the second level corresponds to the trip indicator circuit receiving power from the monitored current, such that the display means indicates when there is at least a minimum of power being drawn from the monitored current but not necessarily sufficient power to operate the control means.

10. A trip indicator circuit, according to claim 9, wherein the display means includes means to indicate a percentage of maximum allowable continuous current in the current path.

11. A trip indicator circuit, according to claim 9, wherein the display means includes a plurality of bar indicators for indicating one of a plurality of percentages of maximum allowable continuous current in the current path.

12. A trip indicator circuit, according to claim 9, wherein the second level corresponds to the system providing operating power to the trip indicator circuit.

13. A trip indicator circuit, according to claim 9, wherein the display is an LCD type and the indicator means includes an LCD bar segment.

Circuit Breaker Description
TECHNICAL FIELD

The present invention relates generally to circuit breakers, and, more particularly, to processor controlled trip arrangements for circuit breakers.

BACKGROUND ART

Trip systems are designed to respond to power faults detected in circuit breakers. Most simple trip systems employ an electromagnet to trip the circuit in response to short circuit or overload faults. The electromagnet provides a magnetic field in response to the current flowing through the breaker. When the current level increases beyond a predetermined threshold, the magnetic field "trips" a mechanism which causes a set of circuit breaker contacts to release, thereby "breaking" the circuit path.

Many simple trip systems also employ a slower responding bi-metallic strip, which is useful for detecting a more subtle overload fault. This is because the extent of the strip's deflection represents an accurate thermal history of the circuit breaker and, therefore, even slight current overloads. Generally, heat generated by the current overload will cause the bi-metallic strip to deflect into the tripping mechanism to break the circuit path.

The tripping systems discussed above are generally adequate for many simple circuit breaker applications, but there has been an increasing demand for a more intelligent and flexible tripping system. For example, many industries today include 3-phase power equipment that must be adjusted and monitored on a regular basis. Processor-based tripping systems have been developed to meet these needs.

Processor-based tripping systems typically indicate the status of the tripping system in an expensive and power inefficient manner. One known system, for example, employs a pop-up plunger to indicate certain types of trip causes. The pop-up plunger includes a solenoid mechanism that is not only expensive, but also requires an excessive amount of power.

Other systems use light emitting diodes (LEDs) to indicate the status of the tripping system. LEDs are less expensive than the pop-up plunger devices but, due to their power consumption, require a relatively expensive external power source.

Accordingly, in addition to providing flexibility to power distribution systems, processor-based tripping systems must also efficiently and reliably display their status in a cost effective manner.

SUMMARY OF INVENTION

In view of the above, a preferred embodiment of the present invention includes a fault-powered, processor-based circuit breaker tripping system having a low power trip indicator circuit that is normally powered from the tripping system. An LCD is used to indicate the status of the system, and a battery is used as a secondary power source after a trip terminates the power to the system. The battery is activated by a latch which responds to one of a plurality of trip signals from the processor. The latch also provides signals to a driver circuit to drive the LCD. Once activated, the battery provides power to the LCD driver circuit so that the cause of the trip may be displayed after a power fault.

Another aspect of the present invention involves an indication to the user that the fault-powered system is sensing a low amount of power from the current path. A segment is employed on the LCD, in response to a steady state signal representing the power in the current path, to indicate that a low level of power, below all fault levels and insufficient to power the tripping system, is in the current path.

BRIEF DESCRIPTION OF THE DRAWINGS

Other objects and advantages of the invention will become apparent upon reading the following detailed description and upon reference to the accompanying drawings, in which:

FIG. 1 is a block diagram of a microprocessor based circuit breaker tripping system, according to the present invention;

FIG. 2 is a perspective view of the circuit breaker tripping system as set forth in the block diagram of FIG. 1;

FIG. 3a is a diagram illustrating a local display 150 of FIG. 1;

FIG. 3b is a flow chart illustrating a manner in which a display processor 316 of FIG. 3a may be programmed to control an LCD display 322 of FIG. 3a;

FIG. 4 is a schematic diagram illustrating an analog input circuit 108, a ground fault sensor circuit 110, a gain circuit 134 and a power supply 122 of FIG. 1;

FIG. 5 is a timing diagram illustrating the preferred manner in which signals received from the gain circuit 134 are sampled by the microcomputer 120 of FIG. 1;

FIG. 6a is a side view of a rating plug 531 of FIG. 4;

FIG. 6b is a top view of the rating plug 531 of FIG. 4;

FIG. 7 is a schematic diagram illustrating a thermal memory 138 of FIG. 1;

FIG. 8 is a schematic diagram illustrating the reset circuit 124 of FIG. 1; and

FIG. 9 is an illustration of a user select circuit 132 of FIG. 1.

While the invention is susceptible to various modifications and alternative forms, a specific embodiment thereof has been shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that it is not intended to limit the invention to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.

BEST MODES FOR CARRYING OUT THE INVENTION

System Overview

The present invention has direct application for monitoring and interrupting a current path in an electrical distribution system according to specifications that may be programmed by the user. While any type of current path would benefit from the present invention, it is particularly useful for monitoring and interrupting a three phase current path.

Turning now to the drawings, FIG. 1 shows a block diagram of an integral microprocessor controlled tripping system 100 for use with a three-phase current path on lines 106 having source inputs 102 and load outputs 104. The tripping system 100 uses an analog input circuit 108 and a ground fault sensor 110 to detect three-phase current on the current path 106. When the tripping system detects an overload, short circuit or ground fault condition, or otherwise determines that the current path should be interrupted, it engages a solenoid 112 which trips a set of contactors 114 to break the current path carrying phases A, B and C. Consequently, any ground-fault circuit through the earth ground path or through an optional neutral line (N) is also broken.

The tripping system 100 of FIG. 1 utilizes a number of circuits to determine when the current path should be interrupted. This determination is centralized at a microcomputer 120, preferably an MC68HC11A1, which is described in MC68HC11 HCMOS Single Chip Microcomputer Programmer's Reference Manual, 1985 and MC68HC11A8 Advance Information HCMOS Single Chip Microcomputer, 1985, all being available from Motorola, Inc., Schaumburg, Ill. Peripheral circuits that support the microcomputer 120 include a reset circuit 124 that verifies the sanity of the tripping system 100, a voltage reference circuit 126 that provides a stable and reliable reference for analog to digital (A/D) circuitry located within the microcomputer 120, ROM 128 that stores the operating instructions for the microcomputer 120, and a conventional address and data decoding circuit 130 for interfacing the microcomputer 120 with various circuits including the ROM 128 and a user select circuit 132. The address and data decoding circuit 130, for example, includes an address decoder part No. 74HC138, and an eight-bit latch, part No. 74HC373, to latch the lower eight address bits which are alternately multiplexed with eight data bits in conventional fashion. The ROM, for example, is part No. 27C64. The user select circuit 132 allows the user to designate tripping characteristics for the tripping system 100, such as overload and phase imbalance fault conditions.

The tripping system 100 is operatively coupled with a conventional electrical distribution system (not shown) through input and output restraint circuits 105 and 107. Signals received from the input restraint circuit 105 indicate that a downstream circuit breaker is in an overload (or over current) condition. The output restraint circuit 107 is used to send signals to upstream circuit breakers to indicate the status of its own and all downstream circuit breaker conditions. In general, the tripping system 100 will delay tripping of the contactors 114 when a downstream breaker is in an overload (or over current) condition, assuming that the downstream circuit breaker opens and clears the condition. Otherwise, the tripping system 100 should not delay tripping of the contactors 114. For further detail regarding restraint-in/restraint-out electrical distribution systems, reference may be made to U.S. Pat. No. 4,706,155 to Durivage et al.

Other circuits are used along with the above circuits to provide reliability and integrity to the tripping system 100. For instance, the microcomputer 120 utilizes the analog input circuit 108 along with a gain circuit 134 to measure precisely the RMS (Root Mean Squared) current on each phase of the lines 106. The accuracy of this measurement is maintained even in the presence of non-linear loads.

The analog input circuit 108 develops phase signals A', B' and C' that are representative of the current on lines 106. The gain circuit 134 amplifies each phase signal A', B' and C' through respective dual gain sections, from which the microcomputer 120 measures each amplified signal using its A/D circuitry. By providing two gain stages for each signal A', B' and C', the microcomputer 120 can immediately perform a high gain or low gain measurement for each current phase depending on the resolution needed at any given time.

The analog input circuit 108 is also utilized to provide a reliable power source to the tripping system 100. Using current developed from the lines 106, the analog input circuit 108 operates with a power supply 122 to provide three power signals (VT, +9 v and +5 v) to the tripping system 100. The power signal VT is monitored by the microcomputer 120 through decoding circuit 130 to enhance system dependability.

System dependability is further enhanced through the use of a thermal memory 138 which the microcomputer 120 interacts with to simulate a bi-metal deflection mechanism. The thermal memory 138 provides an accurate secondary estimate of the heat in the tripping system 100 in the event power to the microcomputer 120 is interrupted.

The ground fault sensor 110 is used to detect the presence of ground faults on one or more of the lines 106, and to report the faults to the microcomputer 120. Using user selected trip characteristics, the microcomputer 120 determines whether or not the ground fault is present for a sufficient time period at a sufficient level to trip the contactors 114. The microcomputer 120 accumulates the ground fault delay time in its internal RAM. A RAM retention circuit 140 is used to preserve the ground fault history for a certain period of time during power interruptions.

The RAM retention circuit 140 exploits the built-in capability of the microcomputer 120 to hold the contents of its internal RAM provided that an external supply voltage is applied to its MOPDB/Vstby input 141. This external supply voltage is stored on a 150 microfarad electrolytic capacitor 143 that is charged from the +9 volt supply through a 6.2 K ohm resistor 145. The capacitor 143 is charged from the +9 volt supply, and clamped by diodes to the +5 volt supply, so that the capacitor will be rapidly charged during power-up.

The ground fault delay time stored in internal RAM becomes insignificant after a power interruption that lasts longer than about 3.6 seconds. To test whether such an interruption has occurred, the RAM retention circuit 140 includes an analog timer 149 having a resistor 161 and a capacitor 153 establishing a certain time constant, and a Schmitt trigger inverter 155 sensing whether the supply of power to the microcomputer 120 has been interrupted for a time sufficient for the capacitor 153 to discharge. Shortly after the microcomputer reads the Schmitt trigger 155 during power-up, the capacitor 153 becomes recharged through a diode 157 and a pull-up resistor 159. Preferred component values, for example, are 365 K ohms for resistor 161, 10 microfarads for capacitor 153, part No. 74HC14 for Schmitt trigger 155, 1N4148 for diode 157, and 47 K ohms for resistor 159.

Another important aspect of the tripping system 100 is its ability to transfer information between itself and the user. This information includes the real-time current and phase measurements on the lines 106, the system configuration of the tripping system 100 and information relating to the history of trip causes (reasons why the microcomputer 120 tripped the contactors 114). As discussed above, the real-time line measurements are precisely determined using the analog input circuitry 108 and the gain circuit 134. The system configuration of the tripping system 100 and other related information is readily available from ROM 128 and the user select circuit 132. The information relating to the history of trip causes is available from a nonvolatile trip memory 144. Information of this type is displayed for the user either locally at a local display 150 or remotely at a conventional display terminal 162 via remote interface 160. To communicate with the display terminal 162, the tripping system utilizes an asynchronous communication interface, internal to the microcomputer 120. Using the MC68HC11, the serial communications interface (SCI) may be utilized.

FIG. 2 is a perspective view of the tripping system 100 as utilized in a circuit breaker housing or frame 210. The lines 106 carrying phase currents A, B and C are shown passing through line embedded current transformers 510, 512 and 514 (in dashed lines) which are part of the analog input circuit 108. Once the solenoid 112 (also in dashed lines) breaks the current path in lines 106, the user reconnects the current path using a circuit breaker handle 220.

Except for the circuit breaker handle 220, the interface between the tripping system 100 and the user is included at a switch panel 222, an LCD display panel 300 and a communication port 224. The switch panel 222 provides access holes 230 to permit the user to adjust binary coded decimal (BCD) dials (FIG. 8) in the user select circuit 132. The communication port 224 may be used to transfer information to the display terminal 162 via an optic link (not shown).

In the following sections, the tripping system 100 is further described in detail.

A. Local Display

FIG. 3a is a schematic diagram of the local display 150 of FIG. 1. The local display 150 is physically separated from the remaining portion of the tripping system 100, but coupled thereto using a conventional connector assembly 310. The connector assembly 310 carries a plurality of communication lines 312 from the microcomputer 120 to the local display 150. These lines 312 include tripping system ground, the +5 V signal from the power supply 122, serial communication lines 314 for a display processor 316, and data lines 318 for a latch 320. The data lines 318 include four trip indication lines (overload, short circuit, ground fault and phase unbalance) which are clocked into the latch 320 by yet another one of the lines 318.

An LCD display 322 displays status information provided by the latch 320 and the display processor 316. Different segments of the LCD display 322 may be implemented using a variety of devices including a combination static drive/multiplex custom or semi-custom LCD available from Hamlin, Inc., Lake Mills, Wis. For additional information on custom or semi-custom displays, reference may be made to a brochure available from Hamlin, Inc. and entitled Liquid Crystal Display.

The latch 320 controls the segments 370-373 to respectively indicate the trip conditions listed above. Each of these segments 370-373 is controlled by the latch 320 using an LCD driver circuit 326 and an oscillator circuit 328. The corresponding segment 370-373 illuminates when the associated output signal from the latch 320 is at a logic high level.

The display processor 316 controls four seven-segment digits 317 as an ammeter to display the current in the lines 106. The display processor 316, for example, is an NEC part No. UPD7502 LCD Controller/Driver which includes a four-bit CMOS microprocessor and a 2k ROM. This NEC part is described in NEC UPD7501/02/03 CMOS 4-Bit Single Chip Microprocessor User's Manual, available from NEC, Mountain View, Calif. Other segments 375 of the LCD display 322 may be controlled by the display processor 316 or by other means to display various types of status messages.

For example, a push button switch 311 may be utilized to test a battery 338. To perform this test, the battery 338 is connected through a diode 313 to one of the segments 375 so that when the switch 311 is pressed, the condition of the battery is indicated. The push-button switch 311 preferably resets the latch 320 when the switch is depressed. For this purpose the switch 311 activates a transistor 315. The latch, for example, is a 40174 integrated circuit.

Additionally, the switch 311 may be used to select the phase current to be displayed on the LCD display 322 to control segments 375 such that they identify the phase current (A, B, C or N) on lines 106 being displayed on the four seven-segment digits 317. For this purpose the switch 311 activates a transistor 327 to invert a signal provided from the battery and to interrupt the display processor 316. Each time the display processor 316 is interrupted, the phase current that is displayed changes, for example, from phase A to B to C to ground fault to A, etc.

An optional bar segment 324 is included in the LCD display 322 to indicate a percentage of the maximum allowable continuous current in the current path. The bar segment 324 is controlled by the +5 V signal via a separate LCD driver 330. The LCD driver 330 operates in conjunction with the oscillator circuit 328 in the same manner as the LCD driver 326. However, the LCD driver 330 and the oscillator circuit 328 will function at a relatively low operating voltage, approximately two to three volts. An MC14070 integrated circuit, available from Motorola, Inc., may used to implement the LCD drivers 330 and 326. Thus, when the tripping system fails to provide the display processor 316 with sufficient operating power (or current), the LCD driver 330 is still able to drive the bar segment 324. The LCD driver 330 drives the bar segment 324 whenever the tripping system detects that less than about 20% of the rated trip current is being carried on lines 106 to the load.

As an alternative embodiment, the bar segment 324 may be disabled by disconnecting the LCD driver 330.

Additional bar segments 332-335 are driven by the display processor 316 to respectively indicate when at least 20-40%, 40-60%, 60-80% and 80-100% of the rated trip current is being carried on lines 106 to the load.

The oscillator 328 also uses part No. MC14070 in a standard CMOS oscillator circuit including resistors 329, 336 and a capacitor 331 that have values, for example, of 1 megohm, 1 megohm, and 0.001 microfarads, respectively.

Even when a power fault causes the system to trip and interrupt the current on lines 106, the local display is still able to operate on a limited basis. This sustained operation is performed using the battery 338 as a secondary power source. The battery, for example, is a 3 to 3.6 volt lithium battery having a projected seventeen year life. The battery 338 supplies power to portions of the local display 150 only when two conditions are present: (1) the latch 320 has received a trip signal from the microcomputer 120 (or the test switch 311 is activated), and (2) the output voltage level of the +5 V power supply is less than the voltage level from the battery 338. When the latch 320 latches in any one of the four trip indication lines from the data lines 318, a control signal is generated on a latch output line 340. The control signal turns on an electronic switch 342 which allows the battery 338 to provide power at Vcc so long as a diode 344 is forward biased.

The diode 344 is forward biased whenever the second condition is also present. Thus, when the output voltage level of the +5 V power supply is less than the voltage level from the battery 338, the diode 344 is forward biased and the battery 338 provides power to the local display 150. In addition, the diode 344 is forward biased until a switch 346, activated by a power-up circuit 348, allows the +5 V signal to provide power at Vcc. The power-up circuit 348 activates the electronic switch 346 only after resetting the display processor 316. The power-up circuit 348, for example, is part No. ICL7665 working in connection with resistors 349, 351, and 353 having values of 620 K ohms, 300 K ohms and 10 megohms, respectively.

Power is provided from Vcc only to the latch 320, the LCD driver 326, the LCD driver 330, and the oscillator circuit 328. The LCD driver 330 and the oscillator circuit 328 receive power from either the battery 338 or the +5 V power supply output via diodes 350 and 352. This arrangement minimizes current drain from the battery 338 while allowing the user to view the status of the tripping system 100 during any power fault situation.

Power cannot be drawn from the battery 338 unless the battery 338 is interconnected with the remaining portion of the tripping system via connector 310, because the connector 310 provides the ground connection for the negative terminal of the battery 338. This aspect of the local display 150 further prolongs battery life and therefore minimizes system maintenance.

In FIG. 3b, a flow chart illustrates the preferred programming of the display processor 316. The flow chart begins at block 376 where the memory internal to the display processor is initialized. The memory initialization includes clearing internal RAM, input/output ports and interrupt and stack registers.

At block 378, a software timer is reset and the display processor waits for a data ready flag which indicates that data has been received from the microcomputer 120 of FIG. 1. The software timer provides a conventional software watchdog function to maintain the sanity of the display processor. If the software timer is not reset periodically (within a certain time interval), the display processor resets itself.

The data ready flag is set in an interrupt routine, illustrated by blocks 390 through 398 of FIG. 3b. The display processor is programmed to execute the interrupt routine when it receives data from the microcomputer 120 of FIG. 1. At block 390 of the interrupt routine, a test is performed to determine if the data byte just received is the last data byte of the packet sent from the microcomputer. If the data byte just received is not the last data byte, flow proceeds to block 398 where a return-from-interrupt instruction is executed. If the data byte just received is the last data byte, flow proceeds to block 392.

At block 392, a test is performed to determine the integrity of the received data packet. This is accomplished by comparing the 8-bit sum of the previously received 7 bytes with the most recently received byte (last byte). If the 8-bit sum and the last byte are different, flow proceeds to block 398. If the 8-bit sum and the last byte are the same, the display processor sets the previously referred to data ready flag, depicted at block 396, and returns from the interrupt, via block 398, to block 380.

At block 380, the received data is stored in memory and the data ready flag is reset.

At blocks 382 and 384, the display processor utilizes a conventional conversion technique to convert the stored data to BCD format for display at the LCD display 322 of FIG. 3a. The data that is sent and displayed at the LCD display 322 is chosen by the operator using the switch 311 to sequence through each of the three phase currents and the ground fault current, as indicated in the data that is received from the microcomputer 120 of FIG. 1.

At block 386, the display processor utilizes received data, including the sensor identification, the rating plug type and the long-time pickup level, to determine the percentage of rated trip current being carried on lines 106 of FIG. 1. At block 388, the bar segments (324 and 332-335 of FIG. 3a) are driven by the display processor in response to this determination. From block 388, flow returns to block 378.

Blocks 400-406 of FIG. 3b represent a second interrupt routine which the display processor may be programmed to execute in response to the depression of the switch 311. At block 400 of this second interrupt routine, the display processor determines which phase (or ground fault) current the operator has selected by depressing the switch 311. At blocks 402 and 404, the display processor monitors its I/O port to determine when the switch 311 is released and to debounce the signal received from the switch 311. At block 406, the display processor executes a return from interrupt command.

It should be noted that the display processor 316 is optional for the local display 150 and therefore not required for its operation. Further, the local display 150 is itself an option to the tripping system and is not required for operating the tripping system.

B. Current and Ground Fault Detection

FIG. 4 illustrates an expanded view of the analog input circuit 108, the ground fault sensor 110, the power supply 122 and the gain circuit 134 of FIG. 1. Each of these circuits receives power from the three-phase current lines 106. Using this power, these circuits provide signals from which the tripping system 100: (1) determines the phase and current levels on lines 106, (2) detects the presence of any ground fault, (3) provides system power and (4) establishes its current rating.

(1) Determining Phase and Current Levels

In FIG. 4, the analog input and ground fault sensing circuits 108 and 110 include current transformers 510, 512 and 514 that are suitably located adjacent the lines 106 for receiving energy from each respective phase current path A, B, and C. Each current transformer 510, 512 and 514 is constructed to produce a current output that is proportional to the primary current in a fixed ratio. This ratio is set so that when the primary current is 100% of the rated current transformer size (or sensor size), the current transformer is producing a fixed output current level. For example, for a 200 Amp circuit breaker, each current transformer 510, 512 and 514 will produce the same current output signal when operating at 100% (200 Amps) as a current transformer in a 4000 Amp circuit breaker which it is operating at 100% (4000 Amps). The preferred construction yields a current transformer output current of 282.8 milliamperes (RMS) when the primary current is 100% of the rated current.

The output currents provided by the transformers 510, 512 and 514 are routed through a ground fault sensing toroid 508, full wave rectifier bridges 516, 518 and 520 and the power supply 122 to tripping system ground. The output currents are returned from tripping system ground through a burden resistor arrangement 530. The ground fault sensing toroid 508 sums the output currents from the transformers 510, 512 and 514. In a system utilizing a neutral (N) line 106, the ground fault sensing toroid also sums the output current from a transformer 506, which is coupled to the neutral line (N) to sense any return current. A signal representing this current summation is produced at an output winding 509 and is carried to a fourth rectifier bridge 522. The rectifier bridge 522 is used to detect ground fault conditions and is discussed in the second part of this section.

On the right (positive) side of the rectifier bridges 516-522, positive phase current signals are produced and added together at lead 524. The current at lead 524 is used for the power supply 122 which is discussed in the third part of this section.

On the left (negative) side of the rectifier bridges 516-520, negative phase current signals are carried through the burden resistor arrangement 530 and tripping system ground, and are returned to the rectifier bridges 516-520 through the power supply 122. This current path establishes voltage signals A', B' and C', each referred to as a burden voltage, for measurement by the microcomputer 120 via the gain circuit 134.

In FIG. 4, the signals A', B' and C' are presented to the respective dual gain sections for inversion and amplification. The gain circuit 134 of FIG. 4 is shown with one of its three identical dual gain sections, generally designated as 533, in expanded form. The dual gain section 533 receives phase signal A'. Each dual gain section includes a pair of low pass filters 532 and a pair of amplifiers 534 and 536. The low pass filters 532 provide noise suppression, and the amplifiers 534 and 536 reduce the signal magnitude by 0.5 and increase the signal magnitude by a factor of 3, respectively, for the desired resolution. This arrangement allows the microcomputer 120 to instantaneously measure these current levels without wasting time changing any gain circuitry. Preferred component values are, for example, 10 K ohms for resistors 541, 543, 545, 553 and 555; 4.75 K ohms for resistors 547 and 559; 60 K ohms for resistor 557; and 0.03 microfarads for capacitors 549 and 561. The amplifiers 551 and 663 are, for example, part No. LM124.

Using the gain circuit 134, the microcomputer 120 measures the true RMS current levels on lines 106 by sampling the burden voltages developed at signals A', B' and C'. The RMS calculations are based on the formula: ##EQU1##

The current flowing through the circuit breaker is sampled at fixed time intervals, thereby developing I(t). The value of this instantaneous current sample is squared and summed with other squared samples for a fixed number of samples N. The mean of this summation is found by dividing it by N. The final RMS current value is then found by taking the square root of the mean.

In FIG. 5, an example of a rectified sinusoidal current waveform is illustrated for 1.5 cycles of a 60 hertz signal with a peak amplitude of 100 amps. The sampled current is full wave rectified. The vertical lines represent the discrete points in time that a value of current is sampled. With a sample rate of 0.5 milliseconds, over 25 milliseconds of time, 50 samples will be taken.

In TABLE 1, the data for the samples from FIG. 4 are illustrated in the column labeled I(t) (Amps). The column labeled I(t) SQUARED (Amps) gives the squared values, and the column labeled SUMMATION (Amps) shows the accumulation of the squared current values over time. The mean of the summation, depicted at the bottom of TABLE 1, is equal to the final accumulation divided by the number of samples, or 50. The square root of this value yields 70.7106854, which is less than 0.00001% in error.

The other columns in TABLE 1 detail the binary equivalent data that the microcomputer would process using the ratio that 100 amps equals 255 binary.

The value I.sub.RMS will accurately reflect the heating effect of the current waveform that existed from t=0 to t=N. This current waveform is typically an A.C. waveform with a fundamental frequency of 50 to 60 Hertz, but may contain many upper harmonics (i.e., multiples of the fundamental frequency).

In practical implementations, several factors affect the accuracy of the I.sub.RMS calculation, including the sample rate and the number of samples. In the preferred embodiment, the sample rate is 2,000 Hertz and at least 128 samples are taken before the current magnitude is estimated.

(2) Detecting The Presence Of A Ground Fault

The ground fault sensing toroid 508 magnetically adds the current signals from the input windings 540, 542, 544 and 546 to indicate whether or not a ground fault is present on lines 106. The toroid 508 is constructed with four identical input windings 540, 542, 544 and 546; one for each of the current transformers 510, 512 and 514 and one for the neutral current path transformer 506, which is optional. The toroid 508 has a single output winding 509 which provides a summed current signal.

The ground fault sensing toroid 508 includes another winding 550 to allow a test signal to be applied at terminals 552. Using momentary switch 554, the test signal creates a pseudo ground fault for the tripping system. The tripping system reacts to this pseudo ground fault in the same manner as a true ground fault. The test winding 550 is protected by a positive coefficient resistor 556 that increases its resistance as it heats, thereby limiting the current through it and the winding 550. The positive coefficient resistor is, for example, a Keystone PTC Resettable Fuse, part No. RL3510-110-120-PTF. The test winding 550 eliminates the need for a separate test transformer which has been utilized by systems in the prior art.

The operation of the ground fault sensing toroid 508 is best understood by considering the operation of the tripping system with a ground fault and without a ground fault. In a balanced three phase system without a ground fault, the current magnitude in each phase is equal but 120 degrees out of phase with the other phases, and no neutral current exists; thus, the output winding 509 produces no current. As the current through any phase (A, B or C) increases, the current in the neutral path is vectorially equal in magnitude but opposite in direction to the increase in phase current, and the magnetic summation is still zero. When a ground fault is present, current flows through an inadvertent path to an earth grounded object, by-passing the neutral transformer 506 and creating a current signal in the transformer 509. Thus, the transformer 509 produces a current signal only when a ground fault is present.

The current signal from the output transformer 509 of the ground fault sensing toroid 508 is routed through the rectifier bridge 522, the power supply 122 and returned through the burden resistor arrangement 530. The burden resistor arrangement 530 and the rectifier bridge 522 convert that current signal into an A.C. rectified signal 558 that is inverted with respect to tripping system ground, and that has a voltage that is proportional to the current in the transformer 509.

The A.C. rectified signal 558 is filtered by filter 560 for noise suppression and then inverted using analog invertor 562. From the analog invertor 562, a positive going signal is carried to an A/D input at the microcomputer 120. The microcomputer 120 measures the peak levels at the output of the analog invertor 562 to detect the presence of a ground fault. A conventional voltage divider switch 564 is controlled by the microcomputer 120 to selectively reduce that signal by two thirds, as may be required under severe ground fault conditions. Preferred component values are, for example, 10 K ohms for resistors 565 and 567; 20 K ohms for resistor 569; 19.6 K ohms for resistor 573; 10 K ohms for resistor 575; 0.033 microfarads for capacitor 577; part No. LM124 for amplifier 579; and part No. BS170 for IGFET 581.

(3) Providing System Power

Power for the tripping system is provided directly from the current on lines 106, and current on any one of the lines 106 can be used. This feature allows the tripping system to power-up on any one of the three phases and to be powered when a ground fault on one or more of the phase lines 106 is present.

The output currents which are induced by the transformers 510, 512 and 514 are routed through the rectifier bridges 516, 518, 520 and 522 to provide the current for the power supply 122. On the right side of the rectifier bridges 516-522, at lead 524, the output currents are summed and fed directly to a Darlington transistor 568, a 9.1 volts zener diode 570 and a bias resistor 572. Most of this current flows directly through the transistor 568 to ground, to create a constant 9.1 volt level at the base of the transistor 568. Because it has a nominal emitter to base voltage (Veb) of about 1.0 volts, the emitter of the transistor 568 is at approximately 10 volts. The transistor 568 will strive to maintain 10 volts across it from emitter to collector, regardless of the current through it. Preferred component values are, for example, part No. 2N6285 for Darlington transistor 568; 1N4739 for zener diode 570; and 220 ohms for resistor 572.

At the emitter of the transistor 568, the power signal VT ("trip voltage") is provided.

The +5 v signal is a regulated +5 v power supply output signal that is provided using a voltage regulator 571 (part No. LP2950ACZ-5.0) and a capacitor 582 which prevents the output of the regulator 571 from oscillating. The voltage regulator takes its input from VT via a diode 576. The diode 576 charges capacitor 584 to within one diode drop (0.6 v) of VT and creates a second supply source of approximately +9 v, which is referred to as the +9 V power supply. The energy stored in the capacitor 584 enables the electronic circuitry being powered by the +9 V power supply to remain powered for some time after a trip occurs. A capacitor 574, connected at the emitter of the transistor 568, aids in filtering voltage ripple. The capacitor 574 is also utilized as the energy storage element for the solenoid 112 which is activated when a power IGFET 583 is turned on by "trip" signals from the microcomputer (120 in FIG. 1) or from a watchdog circuit (712 in FIG. 8). The trip signals are combined by respective diodes 591, 593. The solenoid 112 is also activated by an over-voltage condition sensed by a 16-volt zener diode 595, such as part No. 1N5246. Preferred component values are, for example, 220 microfarads for capacitor 574, 100 microfarads for capacitor 584, 10 microfarads for capacitor 582, 100 K ohms for resistor 585, 10 K ohms for resistor 589, 0.1 microfarads for capacitor 587, and part No. 6660 for IGFET 583.

Diodes 576 and 578 are used to receive current from an optional external power supply (not shown).

(4) Establishing The Current Rating

On the left side of the rectifier bridges, negative phase signals (A', B' and C') from the bridges are provided to the burden resistor arrangement 530, including a rating plug 531, to set the current rating for the tripping system. As previously discussed, when the primary current is 100% of the rated current or "sensor size", which is designated using user select circuit 132, the current transformer output current will be 282.8 milliamperes (RMS). Thus, when the microcomputer 120 reads the burden voltages using the gain circuit 134 (FIG. 1), the microcomputer 120 can calculate the actual current in the lines 106.

FIG. 4 illustrates parallel connections between respective resistors 527 and 529 which are used to establish the maximum allowable continuous current passing through the lines 106. The resistors 527 are part of the rating plug 531, and the resistors 529 are separate from the rating plug 531. The resistors 529, for example, are each 4.99 ohm, 1%, 5 watt resistors. This value should be compared to a corresponding value of 12.4 ohms for the burden resistor 525 for the ground fault signal. The resistors 527 of the rating plug are connected in parallel with the resistors 529 and hence cause a decrease in the combined resistance. Therefore, the resistors 529 set the minimum current rating for the tripping system. In a preferred arrangement, for example, the minimum current rating corresponds to 40% of the maximum current rating. The resistors 527 in the rating plug scale the voltages (A', B', C') read by the microcomputer. This enables the resolution of the A/D converter in the microcomputer to be the same in terms of a fraction of the rated current for both the minimum and maximum current rating. Consequently, there is not any sacrifice in converter resolution for the minimum current rating.

In FIGS. 6a and 6b, the rating plug 531 is shown to include the resistors 527 mounted on a printed circuit board 587. A connector 588 is used to interconnect the rating plug with the remaining portion of the tripping system 100. When the rating plug is absent from the tripping system, the system reverts to its minimum rating.